The present invention relates to semiconductors, and more specifically, to cooling semiconductors. A three-dimensional integrated circuit (3D IC) may be formed by stacking multiple dies, where the stacked dies are interconnected vertically using through-silicon vias (TSVs). The heat generated by a high power die is removed by attaching a heatsink or coldplate on the top of the die. To meet the thermal requirements of stacking multiple dies in a 3D IC, the stack is limited to low power chips or the die of the stack which utilizes the most power or otherwise generates the most heat is typically placed at the top of the stack closest to the heatsink with lower power dies placed below.